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https://docs.altera.com/r/docs/849710/25.3.1/gts-dynamic-reconfiguration-controller-ip-user-guide-agilextm-5-fpgas-and-socs/testing-the-hardware-design-example-for-tse/multirate-ethernetcompleted10.4. Testing the Hardware Design Example for TSE/Multirate Ethernet • GTS Dynamic Reconfiguration Controller IP User Guide Agilex™ 5 FPGAs and SoCs • Altera Documentation and Resources Center-